Cadence announced an IP design solution for LPDDR5X memories – Techtime

by time news

January 5, 2023

Completed the first LPDDR5X DRAM memory interface IP design, operating at a maximum speed of 8533Mbps. LPDDR5X memory is characterized by high volume and low power, and is used in mobile accessories and demanding products

Cadence today announced the first IP design of an LPDDR5X type DRAM memory interface operating at a maximum speed of 8533Mbps – about 33% faster than the previous generation of LPDDR IP. The IP LPDDR5X solution is based on a new architecture optimized for LPDDR5 and GDDR6. It includes a silicon-proven PHY and controller that connects to LPDDR5X DRAM devices compliant with the JEDEC JESD209-5B standard. LPDDR5X memory is characterized by high volume and low power, and is used in mobile systems and demanding products such as driver assistance systems (ADAS), artificial intelligence at network edges and data networks.

Cadence reported that the new product supports the fastest data rate defined in the JEDEC standard (JESD209-5B). The LPDDR5X controller and PHY have been tested using Cadence’s Validation IP (VIP) for LPDDR5X to provide fast validation closure at the SoC and IP levels. The VIP product for LPDDR5 X includes a complete solution from IP to system level verification with DFI VIP, LPDDR5X memory model and System Performance Analyzer.

The speed of LPDDR5X will raise the bar of performance and the experience of using devices,” said Michael Baska, Vice President of Products and Systems at Micron. “The collaboration with Cadence will allow the next generation of chips to operate with power-saving and high-performance memory, which will be processed transparently in the background.” Cadence IP Group CEO Sanjeev Aggarwala said Cadence LPDDR5X IP introduces Cadence’s next-generation architecture for complete IP solutions of memory systems. “It allows today to carry out future plans of the industry in the fields of artificial intelligence (AI), vehicles and mobile systems on a chip (SoC)”.

Published in the categories: news, software and electronic planning

Posted in tags: IP, memories, cadence

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