Intel has clarified the rollout plans for its upcoming processor architecture, confirming that its new CPU core will debut on desktop platforms ahead of the data center. Robert Hallock, Intel vice president and general manager of the enthusiast channel business, discussed the strategy according to Videocardz while comparing the company’s approach with competitor strategies. The discussion followed AMD’s decision to introduce its Zen 6 architecture with EPYC Venice chips in the data center before releasing a consumer lineup.
Intel Confirms Nova Lake New CPU Core Will Launch on Desktop First
I have a new core. It’s coming to desktop first. I mean, I hope enthusiasts do the math about that one,
Hallock said, as reported by Tom’s Hardware. While Hallock did not disclose the specific name or detailed specifications of the core, he explicitly confirmed that consumer desktop hardware is the primary destination.
Intel has previously indicated that Nova Lake is slated for a 2026 rollout, following Panther Lake as its next client product. Although server cores derived from related architectures are also in development, Hallock’s confirmation ensures that consumer processors will receive the new core before any Xeon products.
Kernel Logs Reveal Early Desktop Silicon Testing
Publicly accessible documentation has provided further technical indicators regarding the progress of the desktop hardware. Kernel boot logs discovered within Intel’s graphics continuous integration infrastructure reveal that desktop Nova Lake-S silicon is already booting internally according to Notebookcheck.
The logs identify two distinct test boards—designated as bat-nvls-1 and bat-nvls-2—running on the drm-xe-fixes branch. Both boards utilize a DMI string indicating an Intel Corporation Nova Lake Client Platform / NVL-S
and decode to CPUID 300F15, sharing a BIOS build dated July 16, 2026. The test samples additionally expose AVX-512 and Advanced Performance Extensions (APX) register save states within their XSAVE feature lists.
The two evaluated engineering platforms exhibit configuration differences:
- bat-nvls-1: Listed as an
NVL-S UDIMM 1DPC eDP CRB Fab2
board featuring 24 cores, 24 threads, and a 3,400 MHz base clock. - bat-nvls-2: Listed as an
NVL-S UDIMM 1DPC OC EVCRB
board featuring 28 cores, 28 threads, and a 3,200 MHz base clock.
Industry observers note that engineering samples operate below final production clock speeds and frequently feature disabled cores for hardware validation, meaning these preliminary metrics do not represent final retail specifications or branding.
Graphics Architecture and Launch Timelines
Additional hardware leaks shed light on the integrated graphics and power configurations planned for the ecosystem. Details outlined by leaker Jaykihn and covered by TechPowerUp indicate that upcoming “Nova Lake-S” processors equipped with 12 Xe3P graphics cores feature a Power Limit 2 (PL2) setting of approximately 40 watts, while the graphics processor’s PL4 is capped at 65 watts.
The Xe3P integrated graphics architecture includes a 20 megabyte L2 cache configuration, representing a 25 percent increase over the 16 megabyte L2 cache found in the 12 Xe3-core iGPU of Panther Lake. Regular SKUs are expected to feature a 4+8+4 core layout consisting of four Performance-cores, eight Efficient-cores, and four Low-Power Efficient-cores alongside 12 GPU cores.
