IRVINE, Calif. – Forget everything you thought you knew about wireless speeds. Engineers at the University of California, Irvine have unveiled a new silicon chip transceiver capable of data transmission rates rivaling those of fiber-optic cables-and it could revolutionize everything from 6G networks to data center efficiency. Imagine downloading multiple 4K movies in the blink of an eye, all without a single cable. That’s the promise of this breakthrough.
A ‘Wireless Fiber Patch Cord’ is Born
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This new technology offers the speed of fiber optics without the physical limitations of cables, perhaps transforming data dialog.
- Speed Demon: Achieves 120 gigabits per second, comparable to fiber optics.
- Energy Efficient: Operates with significantly lower power consumption than existing technologies.
- Future-Proof: Paves the way for 6G and FutureG wireless standards.
- Cost-Effective: Designed for mass production using standard manufacturing processes.
The innovation, detailed in two papers published this month in the IEEE Journal of Solid-State Circuits, centers around a unique architecture that blends digital and analog processing. Researchers devised what they call a “bits-to-antenna” transmitter and an “antenna-to-bits” receiver, working in the 140-gigahertz frequency range-well above current 5G capabilities.
“We call this technology a ‘wireless fiber patch cord’ because it offers the blistering speed of fiber optics without the physical cables,” explained Payam Heydari, NCIC Labs director and UC Irvine Chancellor’s Professor of electrical engineering and computer science, and senior author of both papers. “By operating in the F-band, we can offer massive bandwidths that will transform how machines, robots and data centers communicate.”
Rethinking Circuit Design for Unprecedented Speed
The team’s approach wasn’t about simply making existing technology smaller; it was about fundamentally rethinking how circuits are designed. Heydari’s team began formulating the bits-to-antenna concept in 2020, recognizing that traditional chip architectures were approaching a performance limit due to their reliance on energy-intensive data converters.
“We realized that to reach the elusive 100-gigabit-per-second milestone-which is 100 times the speed of current wireless devices-without melting the chip, we had to fundamentally rethink the circuit topology,” Heydari said. The solution? novel, all-analog architectures that sidestep the power trade-offs plaguing high-speed designs.
Overcoming Transmitter and Receiver Bottlenecks
Conventional transmitt
G Wireless Links, IEEE Journal of Solid-State Circuits (2025). DOI: 10.1109/jssc.2024.3523842
